1. Technical Field
Embodiments of the present disclosure generally relate to semiconductor devices and, more particularly, to word line drivers and semiconductor memory devices including the same.
2. Related Art
Each semiconductor memory device may include word lines, bit lines and memory cells and may store or output data by using the word lines, the bit lines and the memory cells. Each memory cell may include a single cell transistor and a single cell capacitor, and the data may be stored in the cell capacitors of the memory cells. In general, the word lines may be connected to gates of the cell transistors to control switching operations of the cell transistors.
When one of the word lines is selected to receive or output the data, the selected word line may be driven to have a high voltage (generally, denoted by a reference designator “VPP”). The cell transistors connected to the selected word line may be turned on by the high voltage VPP applied to the gates of the cell transistors. In such a case, the cell capacitors and the bit lines connected to the selected word line may share charges through the turned-on cell transistors to receive or output the data.
In the event that the word lines are not selected, the non-selected word lines may be driven to have a low voltage (generally, denoted by a reference designator “VBBW”). Thus, the cell transistors connected to the non-selected word line may be turned off by the low voltage VBBW applied to the gates of the cell transistors. In such a case, the cell capacitors and the bit lines connected to the non-selected word line do not share charges because of the turned-off cell transistors. The charge sharing phenomenon means that the cell capacitor and the bit line are electrically connected to each other through the turned-on cell transistor such that charges freely move between the cell capacitor and the bit line. As a result, the amount of the charges of each of the cell capacitor and the bit line may be changed. The high voltage VPP may be generated using a pump circuit to have a voltage level which is higher than a power voltage (generally, denoted by a reference designator “VDD”), and the low voltage VBBW may be generated using another pump circuit to have a voltage level which is lower than a ground voltage (generally, denoted by a reference designator “VSS”). For example, the non-selected word lines may be driven to have a negative voltage in order to minimize the leakage currents of the cell transistors connected to the non-selected word lines. That is, a negative word line scheme may be employed when the word lines are not selected.
However, when the word line having the high voltage VPP is driven to have the low voltage VBBW, a time it takes a level of the word line to reach the low voltage VBBW may increase due to an increased voltage difference between the high voltage VPP and the low voltage VBBW. If the time it takes the word line to reach the low voltage VBBW increases, undesired data may be stored in the cell capacitor of the memory cell connected to the word line to cause a malfunction.